This invention relates in general to electronic nonvolatile memory devices and in particular to nanoelectronic memristor devices.
The logic and memory device market has generally been following Moore's Law for the last three decades by greatly increasing the number of components that can be provided on an integrated circuit chip. One apparent impact of this densification of solid state electronic components on a chip can be seen in consumer electronic products market, where there has been a large increase in the functionality of consumer electronic products such as, for example, cell phones, gaming consoles, iPhones, and other all-in-one devices, in recent years. In the area of high performance computing, the densification of electronic components on an integrated circuit chip has enabled multi-core computer architectures, thus enabling the next generation of petascale to exascale computing.
Nanoelectronic memristive devices offer a new way to store data by modulating the conductance on a two-terminal device. The conductance of the device is non-volatile in nature, which means that the conductive state of the device is preserved even when the power is turned-off. Current memory technologies use three terminals devices based on flash memory to form the non-volatile storing units. The flash memory devices are predicted to approach their fundamental limits by the year 2020. Memristors, on the other hand, are two terminal devices that require less physical space to build the data storing cells. They can be integrated into cross-bar memory architecture, which will allow for a more dense data storage and increase capacity over current memory technologies. There are a number known memristor devices. One such device is composed of two layers of titanium dioxide film, one of which has a slight depletion of oxygen atoms. The oxygen vacancies act as charge carriers, with the depleted layer having a much lower resistance than the non-depleted layer. When an electric field is applied, the oxygen vacancies drift, changing the boundary between the high-resistance and low-resistance layers and thereby changing the total resistance of the device. Thus, the resistance of the device as a whole is dependent on how much charge has been passed through it in a particular direction, which is reversible by changing the direction of current.
Referring now to the drawings, there is shown in FIG. 1, a prior art nanoelectronic memristor device 10 that has two electrodes 12 and 14 that can be made of metals such as, but not limited to, tungsten, platinum, and ruthenium. Between the electrodes 12 and 14 are two intermediate layers 16 and 18 that form the device. One layer 16 is made of titanium dioxide, while the other layer 18 can be any oxygen-vacancy-rich titanium oxide.
However, current memristor devices, such as the one shown in FIG. 1 offer a relatively low ON/OFF conductance ratio, making it difficult to design large scale integration memory devices for low power applications using this technology. Additionally, the switching speed is much slower in memristor devices when compared with other memory technologies (such as SRAM and DRAM devices). Furthermore, because memristors devices are based on conductance modulation to represent logic states (‘1’ or ON and ‘0’ or OFF states), a large ON/OFF conductance ratio is essential for reliable data access. In the same fashion, having high conductance in both ON/OFF states consumes considerable current to be used in order to read the stored data. This can present a power consumption problem that can restrict memristor technologies for use in low power devices. Therefore, an enhanced nanoelectronic memristor device would be desirable.